Architecture

How the three layers split

The split is not about which layer is “smarter” but about time scale: the three layers are three orders of magnitude apart, so each needs a different hardware and software shape.

The criterion has not changed: can this layer plug in, and does it run once plugged in — not how high it scores. Performance is optimised by each vendor inside its own layer.

Body: motors and I/O

The joint is the core component here. A humanoid robot has more than 14 rotary joints; each joint is a motor, an encoder and a controller board, with a RISC-V DSP doing FOC, hybrid force/position control and vibration suppression.

Cerebellum: real-time control

The key design is physical separation of the two domains: AI compute and real-time control run in parallel on the same chip, real-time cores under RTOS closing joint loops, AI cores under Linux doing planning, without preempting each other.

Brain: on-board AI compute

There are two ways to assemble this layer: one RISC-V AI CPU carrying both real-time and inference, or an AI co-processor next to the host SoC (over PCIe / USB) so compute and host upgrade independently.

Our measurements (footnote)

On a SpacemiT K3 board (Bianbu 4.0.7, kernel 6.18.3, collected 2026-10-21): 1B VLM 24.09 t/s and 24B MoE 12.00 t/s (both Q4_K_M, llama.cpp 0.1.9, AI cores, 8 threads); IME2 970 GMAC/s on one core and 5632 GMAC/s on eight threads (vendor kernel).

These numbers are footnotes and Q&A material only, not the claim of this solution: TOPS is a paper peak, while usable throughput depends on memory bandwidth, operator coverage and thread scheduling.

Instruction set: use what is there

One ISA across all three layers, with extensions taken as needed:

An engineering conclusion: on K3, RVV widening multiply-add reaches roughly 31.94 GMAC/s per core, while IME's vmadot reaches roughly 204 GMAC/s. That is why matrix extensions (IME / AME) are a requirement rather than a bonus — but we state it as an engineering judgement, not as a competitive claim.

Operating system: five distributions plus one RTOS

The two domains cooperate over rpmsg / shared memory / PCIe; the K3 real-time system and rpmsg examples are open source. One SDK covers both domains, so developers keep a familiar open-source ecosystem without lock-in.

AI framework layer: three parallel routes

Engineering measurement (footnote)

ncnn's original int8 path (vmacc) was 4–9× slower than fp32 on K3; dequantising int8 weights back to fp32 at load time and running the mature kernels made convolution-heavy backbones 2.9–9.2× faster (vgg16 9.2×, mobilenet 8.8×, resnet18 6.0×). Across 35 models, 8 clearly benefited, 20 stayed level and 7 were about 10% slower — a per-model choice, not a blanket rule.

Model layer: four categories, closed loop on device

VLA measurement (footnote)

On the same K3 board: smolVLA 0.5B takes 7.5 s per action (ONNX, two 512×512 cameras); ACT grasping takes 2.59 s (int8); a VLA above 2B takes over 45 minutes per inference (GO-1 measured 2705 s) and needs an NPU. The recommended combination is therefore layered: RoboBrain for planning, smolVLA for execution.